NCP1605DR2G【PDF 26/32 页】IC PFC CONTROLLER CCM/DCM 16SOIC

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Sheet目录45

22页 23页 24页 25页 [26页]27页 28页 29页 30页

NCP1605, NCP1605A, NCP1605B

http://onsemi.com

Figure 65. Oscillator Timing Diagram

Figure 66. Oscillator / Synchronization Block

Osc/Sync

100 mA

200 mA

CLOCK

Generation

Latch

(PWM latch

SET input)

delay

(DT is high

during the

deadtime)

COMP_OSC

CLK

Ct_OK

Discontinuous Mode

Critical Mode

Time

Clock

Edge

Set

Signal

Inductor

Current

OSC

H/V

OSC

Figure 67. The Current Source brings V

above 15 V and then Turns Off

15 mA / 0

GND

Cvcc

Auxiliary

Winding

15 V / 7 V

9 V

HVCS_ON

UVLO

(When high, UVLO indicates that the circuit is not properly fed and it sets the Fault latch to turn off the circuit)

Startup Sequence / V

Management

At the moment when the PFC stage is plugged to the

mains outlet, the internal current source starts charging the

capacitor. More generally, the startup current source

is enabled whenever V

drops below V

STUP (7 V,

typically). When V

exceeds the V

ON level (typically

15 V for the NCP1605 and NCP1605B, 10.5 V for the

NCP1605A), the current source turns off and the circuit

starts pulsing.

The energy stored by the V

capacitor serves to feed the

controller and some auxiliary supply must take over before

drops below V

OFF (9 V, typically), that is, the level

below which the circuit stops pulsing.

Hence, the circuit starts operating when the V

voltage

exceeds V

ON and stops pulsing when V

drops below

OFF. The hysteresis (6 V for the NCP1605 and

NCP1605B, 1.5 V for the NCP1605A) prevents erratic

operation as the V

crosses the V

ON threshold.

Figure 67 shows the internal arrangement of this

structure (the V

turn on threshold of Figure 67 is that of

the NCP1605/B). One can note that the startup current

source is on during the V

charging phase and off for the

rest of the time. Hence, it spends no power during the PFC

stage operation and in particular, in light load conditions.

That is why the NCP1605 helps meet the most stringent

standby requirements.

Remarks:

" Some circuitry (not represented in Figure 67) limits

the HV pin current to IC2 (below 1 mA) if the V

voltage is below V

INHIBIT. This protects the

circuit when the V

pin is accidentally grounded.

The full current capability (around 15 mA) is obtained

when V

exceeds V

INHIBIT.

" The circuit is also kept off when the startup current

source is on to make a clear distinction between the

charge phase and the operating sequence (refer to

HVCS_ON signal on block diagram).

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